"An Introduction to IEEE 1666-2011, the New SystemC Standard"
The latest version of the IEEE 1666 Standard SystemC Language Reference Manual, published early in 2012, represents the marriage of the SystemC and TLM-2.0 libraries into a single standard, together with some significant improvements to SystemC relevant to both modeling and synthesis. This tutorial is your chance to see the new features of SystemC and TLM-2.0, presented in full now the new standard has been published, including a behind-the-scenes insight into the motivation behind the changes. It also includes examples illustrating the new features in action using the latest version of the OSCI Proof-of-Concept SystemC simulator, which is compliant to the new IEEE standard.
Topics taught in detail include:
- The new process control extensions to SystemC, which provide more flexibility when using SystemC to model abstract schedulers and abstract clock gating, unify the old thread and clocked thread constructs, and give more flexibility when using SystemC for hardware synthesis.
- New constructs that give more flexibility and control when pausing and restarting the scheduler.
- The new sc_vector class, which has powerful mechanisms for coding regular structures.
- New features that facilitate the use of SystemC with multiple operating system threads, paving the way to exploiting multicore architectures for SystemC simulation.
- Other technical enhancements to SystemC, including event lists, named events, filtering reports based on verbosity, and control over the number of processes that can write to a signal.
- Enhancements to TLM-2.0 that permit more flexible use of the generic payload attributes.
In addition, this tutorial provides an introduction to the forthcoming draft Configuration Standard which targets the configuration of SystemC models. Key classes in the standard are described, including parameters, brokers and accessors. The use of the Configuration Standard to perform common tasks such as creating, initializing, updating, monitoring, hiding and locking parameter values are demonstrated.
This tutorial was presented at the Design and Verification Conference (DVCon) 2012 on February 27.