Technical Tutorial:
"User Experiences at the Forefront of Mixed-Signal Design and Verification"

Presented the Design and Verification Conference (DVCon) 2013 by end-users that are active at the forefront of mixed-signal design and verification, this eight-part video screencast highlights techniques and methodologies to better analyze, model, and simulate the interaction between the analog, digital and software components in a more integral and holistic way.

Helene Thibieroz       

Part 1: Overview and Agenda

Helene Thibieroz, Synopsys
View Presentation (2 min.)

Henry Chang    

Part 2: Common Mistakes Made in Analog Verification

Henry Chang, Designer's Guide Consulting
View Presentation (16 min.)

   

Part 3: The Mixed-Signal Verification Challenge

Jonathan David, Qualcomm Atheros
View Presentation (9 min.)

Christophe Curis    

Part 4: Mixed-Signal Validations for a BIST on ADC

Christophe Curis, STMicroelectronics
View Presentation (10 min.)

   

Part 5: SystemVerilog Modeling for Mixed-Signal SoC Verification

Ozan Erdogan, Maxim Integrated
View Presentation (14 min.)

Martin Barnasconi    

Part 6: AMS System-Level Design and Verification for Automotive Applications

Martin Barnasconi, NXP Semiconductors
View Presentation (10 min.)

   

Part 7: The VERDI Project -- Mixed-Signal Verification and Validation for SystemC/AMS

Thilo Voertler, Fraunhofer Institute
View Presentation (11 min.)

Thang Nguyen    

Part 8: FPGA and AMS Test Chip Approach for Complex SoC Product Design and Verification

Thang Nguyen, Infineon
View Presentation (9 min.)

Sponsored By

ARM Cadence
Mentor Graphics Synopsys