Technical Tutorial:
"Creating Portable Stimulus Models with the Upcoming Accellera Standard"

Portable StimulusPresented the Design and Verification Conference (DVCon) 2017, this tutorial presents an introduction to the Portable Stimulus standard’s main features leveraging a series of usage examples defined by PSWG members that represent many of the common challenges faced in today’s multi-core designs.

Part 1: Portable Stimulus: The Next Leap in Verification & Validation Productivity and Introducing Portable Stimulus Concepts & Constructs

Faris Khundakjie, Intel and Tom Fitzpatrick, Mentor
Contributions by David Brownell, Analog Devices
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Part 2: Building System-Level Scenarios and Generating Tests from Portable Stimulus

Sharon Rosenberg, Cadence and Adnan Hamid, Breker Verification Systems
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Part 3: Coverage in Portable Stimulus, The Hardware/Software Interface Library, and Conclusion

Srivatsa Vasudevan, Synopsys; Karthick Gururaj and Sandeep Pendharkar, Vayavya; Faris Khundakjie, Intel
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