"SystemC Standardization Update Including UVM for SystemC"
The ever-increasing complexity of electronic systems is adding pressure to move to an abstraction above RTL. Recognizing this need, Accellera Systems Initiative member companies are evolving the IEEE 1666 SystemC standard to do just that.
Based itself on the ISO/IEC 14882-2003 standard, SystemC IEEE 1666-2011 provides the language structure to implement transaction level modeling (TLM). As the user community put this standard into practical use, it also realized that more could be done to improve and expand the standard. Today, Accellera is working on standards for analog modeling, a synthesizable subset, model-tool interface, and verification.
The tutorial is split into two sections:
- Part 1: Accellera Systems Initiative SystemC Standards Update
- Part 2: Introduction to the Universal Verification Methodology in SystemC