Technical Tutorial:
"UVM Tips and Tricks Plus Preparing for IEEE UVM"

UVMPresented the Design and Verification Conference (DVCon) 2016, this tutorial provides a plethora of tips and tricks to alleviate the struggle of debugging UVM testbenches.

Part 1: UVM Compile Time Tips and Tricks

Doug Perry, Doulos
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Part 2: UVM Runtime Tips and Tricks

Srivatsa Vasudevan, Synopsys
Slides by Srinivasan Venkataramanan, VerifWorks
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Part 3: Accellera Standards Update - UVM and IEEE-1800.2

Srivatsa Vasudevan, Synopsys
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