Technical Tutorial:
"Lessons from the Trenches: Migrating Legacy Verification Environments to UVM"

Presented by Accellera Verification IP technical subcommittee (VIP-TSC) members at the Design and Verification Conference (DVCon) 2013, this seven-part video screencast provides real stories from end users who work in the trenches making conversion magic happen for their teams as they move to UVM.

John Aynsley    

Part 1: Anecdotes from Hundreds of UVM Adopters

John Aynsley, Doulos
View Presentation (28 min.)

Hassan Shehab    

Part 2: Migrating from OVM to UVM — A Case Study

Hassan Shehab, Intel
View Presentation (16 min.)

Richard Tseng    

Part 3: A Reusable Verification Testbench Architecture Supporting C and UVM Mixed Tests

Richard Tseng, Qualcomm
View Presentation (20 min.)

Asad Khan    

Part 4: UVM to the Rescue — Path to Robust Verification

Asad Khan, Texas Instruments
View Presentation (21 min.)

Mark Litterick    

Part 5: OVM-to-UVM Migration — or There and Back Again, a Consultant's Tale

Mark Litterick, Verilab
View Presentation (23 min.)


Part 6: IBM Recommendations for OVM-to-UVM Migration

Wesley Queen, IBM
View Presentation (11 min.)

Charles Zhang    

Part 7: FPGA Chip Verification Using UVM

Charles Zhang, Paradigm Works
Ravi Ram, Altera

View Presentation (21 min.)

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